The present invention relates to a method of manufacture of a semiconductor device, more particularly, to the manufacture of a semiconductor device having a nonvolatile memory.
A conventional semiconductor chip (which will hereinafter simply be called a “chip”) has, in the circuits thereover, semiconductor elements, such as a MOS (Metal Oxide Semiconductor) transistor requiring a current driving capability and another MOS transistor requiring a higher breakdown voltage, and which operates at a higher voltage than the former MOS transistor.
As a first related method employed for the manufacture of these MOS transistors, the following method can be given as an example. After the formation of a gate electrode of an MOS transistor requiring a current driving capability and a gate electrode of another MOS transistor requiring a high breakdown voltage, an insulating film is formed to cover these gate electrodes. The gate electrode of the MOS transistor requiring a high breakdown voltage is covered with a resist film, followed by wet etching, whereby the thickness of the insulating film that has been formed to cover the gate electrode of the MOS transistor requiring a current driving capability is reduced. Anisotropic dry etching is then performed to form relatively narrow sidewall spacers over the sidewalls of the gate electrode of the MOS transistor requiring a current driving capability. While the resist film covering the gate electrode of the MOS transistor requiring a high breakdown voltage is removed, the gate electrode of the MOS transistor requiring a current driving capability is covered with a resist film. Anisotropic dry etching is conducted to form relatively wide sidewall spacers over the gate electrode of the MOS transistor requiring a high breakdown voltage (refer to, for example, Patent Document 1 and Patent Document 2).
The following is a description of an example of a second related method. After formation of a gate electrode of an MOS transistor requiring a high breakdown voltage and a gate electrode of another MOS transistor requiring a current driving capability, a silicon oxide film, a silicon nitride film and a silicon oxide film are formed successively to cover these gate electrodes. The gate electrode of the MOS transistor requiring a high breakdown voltage is covered with a resist film. Wet etching is then performed to remove the silicon oxide film of the third layer, which has been formed to cover the gate electrode of the MOS transistor requiring a current driving capability. The silicon oxide film which is formed as the first layer and silicon nitride film which is formed as the second layer to cover the gate electrode of the MOS transistor requiring a current driving capability are removed by anisotropic etching to form relatively narrow sidewall spacers. The resist film covering the gate electrode of the MOS transistor requiring a current driving capability is then removed. The three film layers, that is, the silicon oxide film, silicon nitride film and silicon oxide film formed that have been to cover the gate electrode of the MOS transistor requiring a high breakdown voltage are removed by anisotropic etching to form relatively wide sidewall spacers (refer to, for example, Patent Document 3).    [Patent Document 1] Japanese Unexamined Patent Publication No. Hei 7(1995)-176729 (pages 4 to 5, FIGS. 4 to 5)    [Patent Document 2] Japanese Unexamined Patent Publication No. Hei 6(1994)-181293 (pages 9 to 10, FIG. 2)    [Patent Document 3] Japanese Unexamined Patent Publication No. Hei 5(1993)-102428 (pages 2 to 3, FIGS. 10 to 13)